Binary synapse circuitry for high efficiency learning algorithm using generalized boundary condition memristor models

Memristors are memory resistors that promise the efficient implementation of synaptic weights in artificial neural networks [1]. This kind of technology has permitted the implementation of a large number of real world data in an evolutionary learning artificial system. Human brain is capable of processing such data with standard always equal signals that are the synapsis. Our goal is to present a circuit which responds with binary outputs to the signal exiting from the memristors implemented in an artificial neural system that functions through a high efficiency learning algorithm.